1. Field of the Invention
The present invention relates to a mobile communication system, and more particularly, to an interleaver memory access apparatus and method of a mobile communication system.
2. Description of the Background Art
FIG. 1 is a schematic block diagram of a general mobile communication system
As shown in FIG. 1, the conventional mobile communication system includes a frame quality indicator 10 for attaching frame quality indicator bits indicating a transfer rate to a source data; a tail bit attaching unit 20 for attaching a tail bit of 8 bits to an output of the frame quality indicator 10; a convolutional encoder 30 for receiving a data bit from the tail bit attaching unit 20 and generating three code symbols (a serial data) per data bit; a code symbol repetition unit 40 for performing a symbol repetition in order to make the same data size as that of the full rate; an interleaver memory 50 for storing a code symbol outputted from the code symbol repetition unit 40 according to a row and column address outputted from the address generator 60; an orthogonal modulator 70 for receiving the code symbol from the interleaver memory 50, generating one Walsh index for each six code symbols and outputting 64 Walsh codes; and a radio frequency processing unit 80 for spread-modulating the 64 Walsh codes and transmitting a radio frequency signal.
The operation of the mobile communication system constructed as described above will now be explained with reference to the accompanying drawings. At this time, a data rate is assumed to be 4800 bps
When a source data, an analog voice signal, is inputted to the mobile communication system, the corresponding source data is PCM-modulated and inputted to the frame quality indicator (FQI) 10 through a vocoder (not shown).
The frame quality indicator 10 attaches certain bit frame quality indicator bits indicating 4800 bps to the source data, and outputs a 4.4 kbps data bit, and the tail bit attaching unit 20 attaches 8 bit encoder tail bit to the 4.4 kbps data bit and outputs a 4.8 kbps data bit.
The convolutional encoder 30 generates three code symbols for each data bit outputted from the tail bit attaching unit 20 and outputs a 14.4 kbps code symbol.
The code symbol repetition unit 40 performs a code symbol repetition with respect to the output of the convolutional encoder 30 by one time and generates a 28.8 Kbps code symbol, in order to make the same data size as that of the full rate (9600 bps) At this time, if the data rate is 2400 bps, the code symbol repetition unit 40 performs three times of code symbol repetition, while if the data rate is 1200 bps, the code symbol repetition unit 40 performs seven times of code symbol repetition. Accordingly, the rate of the code symbols outputted form the code symbol repetition unit 40 has the same data size as that of the full rate.
As shown in FIG. 2, the interleaver memory 50 includes 32 rows and 18 columns and sequentially writes and reads code symbols outputted from the code symbol repetition unit 40 according to a row and column address outputted from the address generator 60
The orthogonal modulator 70 decodes the code symbols which is inputted from the interleaver memory 50 by 6 ones and generates one Walsh index and selectively outputs one of the 64 Walsh codes by using the generated Walsh index.
Accordingly, the radio frequency processing unit 80 spread-modulates the 4.8 Kbps Walsh code outputted from the orthogonal modulator 70, and converts it into a radio frequency signal to be transmitted.
The access operation of the interleaver memory 50 will now be described in detail.
The mobile communication system supports a variable data rate. Thus, the code symbol repetition unit 40 performs a code symbol repetition with respect to the data rates except for the full rate (9600 bps) in order to facilitate processing of data, i.e. a half rate (4800 bps), a quarter rate (2400 bps) and an eight rate (1200 bps).
The mobile communication system transmits a data through a radio interface However, since a data transmission through the radio interface may occur an unexpected data loss (error) due to various noises, a data interleaving is performed prior to performing a modulation/transmission of the code symbol in order to prevent a burst error.
In the conventional mobile communication system, a data interleaving is performed by the interleaver memory 50 and the address generator 60.
The interleaver memory 50 stores the code symbols outputted from the code symbol repetition unit 50 according to the row and column addresses outputted from the address generator 60.
That is, as shown by a normal interleaver memory map of FIG. 3, the code symbols outputted from the code symbol repetition unit 40 are stored in the interleaver memory 50 in the following order.
Full rate: 1 2 3 4 5 6 7 8 9 10 . . . 570 571 572 573 574 575 576
Half rate: 1 1 2 2 3 3 4 4 5 5 . . . 285 285 286 286 287 287 288 288
Quarter rate: 1 1 1 1 2 2 2 2 3 . . . 143 143 143 143 144 144 144 144
Eight rate: 1 1 1 1 1 1 1 1 2 2 . . . 71 71 71 72 72 72 72 72 72 72 72
When a writing operation is completed, a reading operation of the interleaver memory 50 is performed in the order defined by a mobile communication standard, that is, in the following order of row addresses in the normal interleaver memory map of FIG. 2.
Full rate: 1 2 3 4 5 6 7 8 9 10 . . . 25 26 27 28 29 30 31 32
Half rate: 1 3 2 4 5 7 6 8 9 11 . . . 25 27 26 28 29 31 30 32
Quarter rate: 1 5 2 6 3 7 4 8 . . . 25 29 26 30 27 31 28 32
Eight rate: 1 9 2 10 3 11 4 12 . . . 21 29 22 30 23 31 24 32
For example, assuming that the code symbols of the full rate are stored in the interleaver memory 50 in such a form as shown in FIG. 4, the address generator 60 changes the column address from 1 to 12 in a state that it has outputted one row address, so that 12 code symbols can be sequentially read from the interleaver memory 50. Code symbols of different data rates are read in the order of he same row address and column address as that of the full rate.
As aforementioned, in the conventional mobile communication system, the write operation of the interleaver memory is performed in the input order of the code symbols, and the reading operation is performed in the unit of row, and thus the data spreading is performed to cope with a burst error of a data while maintaining a continuity of the data.
In addition, the writing and reading operations of the interleaver memory are performed in the unit of bit. However, in order to read and write all of the code symbols of one frame of a serial data, the address (row and column) generation and the access operation(read and write) of the interleaver memory are to be repeatedly performed, which runs against achievement of a rapid data processing and a low power consumption
The above references are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.